Invention Application
- Patent Title: VOLTAGE-TO-CURRENT ARCHITECTURE AND ERROR CORRECTION SCHEMES
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Application No.: US18146832Application Date: 2022-12-27
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Publication No.: US20230137935A1Publication Date: 2023-05-04
- Inventor: Ramkumar SIVAKUMAR , Jingxue LU , Sherif GALAL , Xinwang ZHANG , Kshitij YADAV
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Main IPC: G01R19/00
- IPC: G01R19/00 ; H04R3/00 ; H03F3/217 ; H03F1/02

Abstract:
Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.
Public/Granted literature
- US11885836B2 Voltage-to-current architecture and error Public/Granted day:2024-01-30
Information query