An electronic component embedded substrate includes conductor layers L1 to L3, insulating layers 112 and 113 provided between the conductor layers L2 and L3, an insulating layer 114 provided between the conductor layers L1 and L2, a semiconductor embedded in the insulating layers 112 and 113, a via conductor 142 filling a via V, and a via conductor 143 filling a via 143a. The via 143a is provided at such a position that overlaps the via V and is shallower than the via V. The inner wall of the via 143a is larger in surface roughness than the inner wall of the via V. This makes voids less likely to occur in the via conductor 142 filling the deep via V and enhances adhesion between the via conductor 143 and the shallow via 143a that the via conductor 143 fills.