Invention Publication
- Patent Title: SEMICONDUCTOR DEVICE ASSEMBLIES AND ASSOCIATED METHODS
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Application No.: US17857304Application Date: 2022-07-05
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Publication No.: US20240014170A1Publication Date: 2024-01-11
- Inventor: Bharat Bhushan , Akshay N. Singh , Kunal R. Parekh
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/18 ; H01L23/00 ; H01L25/00

Abstract:
A semiconductor device assembly can include an assembly substrate having a top surface, a top semiconductor device having a bottom surface, and a plurality of intermediary semiconductor devices. Each of intermediary semiconductor device can be bonded to both the assembly substrate top surface and the top device bottom surface. Each intermediary semiconductor device can also include a semiconductor substrate, a memory array, a first bond pad, a second bond pad, and a conductive column. The first bond pad can electrically couple the assembly substrate to the intermediary semiconductor device; the second bond pad can electrically couple the top semiconductor device to the intermediary semiconductor device; and the conductive column can electrically couple the first bond pad to the second bond pad, and can be exclusive of any electrical connection to the memory array.
Information query
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