公开(公告)号：US10522507B2

公开(公告)日：2019-12-31

申请号：US16383903

申请日：2019-04-15

申请人： Micron Technology, Inc.

发明人： Hong Wan Ng ,  Akshay N. Singh

IPC分类号： H01L21/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L23/50

摘要： A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.

公开(公告)号：US20190244930A1

公开(公告)日：2019-08-08

申请号：US16383903

申请日：2019-04-15

申请人： Micron Technology, Inc.

发明人： Hong Wan Ng ,  Akshay N. Singh

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L23/50

摘要： A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.

公开(公告)号：US20190172725A1

公开(公告)日：2019-06-06

申请号：US15830839

申请日：2017-12-04

申请人： Micron Technology, Inc.

发明人： Owen R. Fay ,  Akshay N. Singh ,  Kyle K. Kirby

IPC分类号： H01L21/48 ,  H01L21/66 ,  H01L23/498 ,  H01L25/065

摘要： A semiconductor device assembly and method of forming a semiconductor device assembly that includes a first substrate, a second substrate disposed over the first substrate, at least one interconnect between the substrates, and at least one pillar extending from the bottom surface of the first substrate. The pillar is electrically connected to the interconnect and is located adjacent to a side of the first substrate. The pillar is formed by filling a via through the substrate with a conductive material. The first substrate may include an array of pillars extending from the bottom surface adjacent to a side of the substrate that are formed from a plurality of filled vias. The substrate may include a test pad located on the bottom surface or located on the top surface. The pillars may include a removable coating enabling the pillars to be probed without damaging the inner conductive portion of the pillar.

公开(公告)号：US10312219B2

公开(公告)日：2019-06-04

申请号：US15806808

申请日：2017-11-08

申请人： Micron Technology, Inc.

发明人： Hong Wan Ng ,  Akshay N. Singh

IPC分类号： H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L23/50

摘要： A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.

公开(公告)号：US20230395545A1

公开(公告)日：2023-12-07

申请号：US17830224

申请日：2022-06-01

申请人： Micron Technology, Inc.

发明人： Bharat Bhushan ,  Akshay N. Singh ,  Bret K. Street ,  Debjit Datta ,  Eiichi Nakano

IPC分类号： H01L23/00 ,  H01L25/065

CPC分类号： H01L24/08 ,  H01L25/0652 ,  H01L24/80 ,  H01L24/95 ,  H01L2224/80047 ,  H01L2224/8001 ,  H01L2224/80896 ,  H01L2224/80895 ,  H01L2224/08148 ,  H01L2224/95093 ,  H01L2224/80204 ,  H01L2924/3512 ,  H01L2924/37001 ,  H01L2924/182 ,  H01L2924/1011

摘要： Stacked semiconductor assemblies, and related systems and methods, are disclosed herein. A representative stacked semiconductor assembly can include a lowermost die and two or more modules carried by an upper surface of the lowermost die. Each of the module(s) can include a base die and one or more upper dies and/or an uppermost die carried by the base die. Each of the dies in the module is coupled via hybrid bonds between adjacent dies. Further, the base die in a lowermost module is coupled to the lowermost die by hybrid bonds. As a result of the modular construction, the lowermost die can have a first longitudinal footprint, the base die in each of the module(s) can have a second longitudinal footprint smaller than the first longitudinal footprint, and each of the upper die(s) and/or the uppermost die can have a third longitudinal footprint smaller than the second longitudinal footprint.

公开(公告)号：US11094670B2

公开(公告)日：2021-08-17

申请号：US16578592

申请日：2019-09-23

申请人： Micron Technology, Inc.

发明人： Hong Wan Ng ,  Akshay N. Singh

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/50 ,  G11C5/04

摘要： A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.

公开(公告)号：US11088114B2

公开(公告)日：2021-08-10

申请号：US16671546

申请日：2019-11-01

申请人： Micron Technology, Inc.

发明人： Owen R. Fay ,  Kyle K. Kirby ,  Akshay N. Singh

IPC分类号： H01L25/065 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L21/60

摘要： A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.

公开(公告)号：US10529592B2

公开(公告)日：2020-01-07

申请号：US15830839

申请日：2017-12-04

申请人： Micron Technology, Inc.

发明人： Owen R. Fay ,  Akshay N. Singh ,  Kyle K. Kirby

IPC分类号： H01L21/48 ,  H01L21/66 ,  H01L23/48 ,  H01L23/498 ,  H01L25/065

摘要： A semiconductor device assembly and method of forming a semiconductor device assembly that includes a first substrate, a second substrate disposed over the first substrate, at least one interconnect between the substrates, and at least one pillar extending from the bottom surface of the first substrate. The pillar is electrically connected to the interconnect and is located adjacent to a side of the first substrate. The pillar is formed by filling a via through the substrate with a conductive material. The first substrate may include an array of pillars extending from the bottom surface adjacent to a side of the substrate that are formed from a plurality of filled vias. The substrate may include a test pad located on the bottom surface or located on the top surface. The pillars may include a removable coating enabling the pillars to be probed without damaging the inner conductive portion of the pillar.

公开(公告)号：US11631644B2

公开(公告)日：2023-04-18

申请号：US17221537

申请日：2021-04-02

申请人： Micron Technology, Inc.

发明人： Owen R. Fay ,  Kyle K. Kirby ,  Akshay N. Singh

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L21/48

摘要： A semiconductor device assembly can include a semiconductor device having a substrate and vias electrically connected to circuitry of the semiconductor device. Individual vias can have an embedded portion extending from the first side to the second side of the substrate and an exposed portion projecting from the second side of the substrate. The assembly can include a density-conversion connector comprising a connector substrate and a first array of contacts formed at the first side thereof, the first array of contacts occupying a first footprint area on the first side thereof, and wherein individual contacts of the first array are electrically connected to the exposed portion of a corresponding via of the semiconductor device. The assembly can include a second array of contacts electrically connected to the first array, formed at the second side of the connector substrate, and occupying a second footprint area larger than the first footprint area.

公开(公告)号：US11587912B2

公开(公告)日：2023-02-21

申请号：US17383304

申请日：2021-07-22

申请人： Micron Technology, Inc.

发明人： Owen R. Fay ,  Kyle K. Kirby ,  Akshay N. Singh

IPC分类号： H01L25/065 ,  H01L23/498 ,  H01L21/56 ,  H01L23/31 ,  H01L21/60

摘要： A semiconductor device assembly can include a first semiconductor device and an interposer. The interposer can include a substrate and through vias in which individual vias include an exposed portion and an embedded portion, the exposed portions projecting from one or both of the first surface and the second surface of the substrate, and the embedded portions extending through at least a portion of the substrate. The interposer can include one or more test pads, a first electrical contact, and a second electrical contact. The semiconductor device assembly can include a controller positioned on an opposite side of the interposer from the first semiconductor device and operably coupled to the interposer via connection to the second electrical contact.