- 专利标题: MODELING METHOD OF NEURAL NETWORK FOR SIMULATION IN SEMICONDUCTOR DESIGN PROCESS, SIMULATION METHOD IN SEMICONDUCTOR DESIGN PROCESS USING THE SAME, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE USING THE SAME, AND SEMICONDUCTOR DESIGN SYSTEM PERFORMING THE SAME
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申请号: US18171550申请日: 2023-02-20
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公开(公告)号: US20240028910A1公开(公告)日: 2024-01-25
- 发明人: Yunjun Nam , Bogyeong Kang , Hyowon Moon , Byungseon Choi , Jaemyung Choe , Hyunjae Jang , In Huh
- 申请人: Samsung Electronics Co., Ltd.
- 申请人地址: KR Suwon-si
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-si
- 优先权: KR 20220090744 2022.07.22
- 主分类号: G06N3/10
- IPC分类号: G06N3/10 ; G06N3/08 ; G06F30/3308
摘要:
In a modeling method of a neural network, a first regression model is trained based on first sample data and first simulation result data. The first regression model is used to predict the first simulation result data from the first sample data. The first sample data represent at least one of conditions of a manufacturing process of a semiconductor device and characteristics of the semiconductor device. The first simulation result data are obtained by performing a simulation on the first sample data. In response to a consistency of the first regression model being lower than a target consistency, the first regression model is re-trained based on second sample data different from the first sample data. The second sample data are associated with a consistency reduction factor of the first regression model that is responsible for a prediction failure of the first regression model.
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