Invention Publication
- Patent Title: MULTIPLE-PASS PROGRAMMING OF MEMORY CELLS USING TEMPORARY PARITY GENERATION
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Application No.: US17882355Application Date: 2022-08-05
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Publication No.: US20240045616A1Publication Date: 2024-02-08
- Inventor: Kishore Kumar Muchherla , Lakshmi Kalpana Vakati , Dave Scott Ebsen , Peter Feeley , Sanjay Subbarao , Vivek Shivhare , Jiangli Zhu , Fangfang Zhu , Akira Goda
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
Methods, systems, and apparatuses include receiving a write command including user data. The write command is directed to a portion of memory including a first and second block and a first and second user data portion are directed to the first and second block. Temporary parity data is generated using the first and second user data portions. The temporary parity data and the first and second user data portions are stored in a buffer. Portions of the first and second block are programmed with two programming passes. The first and second user data portions in the buffer are invalidated in response to a completion of the second programming pass of the portions of the first and second blocks. The temporary parity data is maintained in the buffer until a second programming pass of the first and second block.
Public/Granted literature
- US12001721B2 Multiple-pass programming of memory cells using temporary parity generation Public/Granted day:2024-06-04
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