发明公开
- 专利标题: INTEGRATED FAN-OUT PLATFORM AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICES
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申请号: US17893354申请日: 2022-08-23
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公开(公告)号: US20240071998A1公开(公告)日: 2024-02-29
- 发明人: Li-Hsien Huang , Hsueh-Lung Cheng , Yao-Chun Chuang , Yinlung Lu
- 申请人: Taiwan Semiconductor Manufacturing Company
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Company
- 当前专利权人: Taiwan Semiconductor Manufacturing Company
- 当前专利权人地址: TW Hsinchu
- 主分类号: H01L25/065
- IPC分类号: H01L25/065 ; H01L23/00 ; H01L23/31 ; H01L23/498 ; H01L25/00 ; H01L25/10
摘要:
A method of packaging a semiconductor includes: positioning first and second semiconductor dies by one another on a carrier substrate, wherein first and second zones zone are defined with respect to the first die and third and fourth zones are defined with respect to the second die; forming first vias in the first zone, the first vias having a first size; forming second vias in the second zone, the second vias having a second size different from the first; forming third vias in the third zone, the third vias having a third size; forming fourth vias in the fourth zone, the fourth vias having a fourth size different from the third; and electrically connecting the first and second dies with an interconnection die such that electrical signals are exchangeable therebetween.
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