Invention Publication
- Patent Title: STACKED SEMICONDUCTOR PACKAGE
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Application No.: US18334062Application Date: 2023-06-13
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Publication No.: US20240079380A1Publication Date: 2024-03-07
- Inventor: Joonghyun BAEK , Jaekyu SUNG , Dongok KWAK , Taeyoung LEE
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Priority: KR 20220111015 2022.09.01
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/00

Abstract:
A stacked semiconductor package may include a package base substrate, a first chip stack including a first semiconductor chips stacked sequentially on the package base substrate, a second chip stack including second semiconductor chips stacked sequentially on the first chip stack, and bonding wires electrically connecting the first semiconductor chips and the second semiconductor chips to the package base substrate. Each of the first semiconductor chips may be shifted by a first interval in a first horizontal direction to have a step shape. Each of the second semiconductor chips may be shifted by the first interval in a second horizontal direction, opposite to the first horizontal direction, to have a step shape. A lowermost second semiconductor chip may be shifted from an uppermost first semiconductor chip by a second interval in the second direction. The second interval may be greater than the first interval.
Information query
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