- 专利标题: MEMORY PACKAGES AND METHODS OF FORMING SAME
-
申请号: US18526016申请日: 2023-12-01
-
公开(公告)号: US20240105682A1公开(公告)日: 2024-03-28
- 发明人: Chen-Hua Yu , Chung-Hao Tsai , Chuei-Tang Wang , Yih Wang
- 申请人: Taiwan Semiconductor Manufacturing Co, Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Co, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co, Ltd.
- 当前专利权人地址: TW Hsinchu
- 分案原申请号: US16745718 2020.01.17
- 主分类号: H01L25/065
- IPC分类号: H01L25/065 ; H01L23/00 ; H01L23/31 ; H01L23/48 ; H01L23/528 ; H10B12/00 ; H10N50/01 ; H10N50/80
摘要:
A package includes a memory stack attached to a logic device, the memory stack including first memory structures, a first redistribution layer over and electrically connected to the first memory structures, second memory structures on the first redistribution layer, a second redistribution layer over and electrically connected to the second memory structures, and first metal pillars on the first redistribution layer and adjacent the second memory structures, the first metal pillars electrically connecting the first redistribution layer and the second redistribution layer, wherein each first memory structure of the first memory structures includes a memory die comprising first contact pads and a peripheral circuitry die comprising second contact pads, wherein the first contact pads of the memory die are bonded to the second contact pads of the peripheral circuitry die.
信息查询
IPC分类: