Various embodiments of the present disclosure are directed towards an integrated circuit (IC). The IC includes a pair of source/drain regions in a substrate. A gate dielectric layer is on the substrate and laterally between the source/drain regions. A gate electrode overlies the gate dielectric layer. A sidewall liner is disposed along sidewalls of the gate electrode and along an upper surface of the substrate. A sidewall spacer overlies the substrate and is on sidewalls and an upper surface of the sidewall liner. The sidewall spacer has a pair of segments respectively on opposite sides of the gate electrode. The sidewall spacer consists essentially of silicon oxycarbonitride. A dielectric constant of the sidewall spacer is greater than that of the sidewall liner.