Invention Publication
- Patent Title: Adaptive Refresh Staggering
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Application No.: US18511404Application Date: 2023-11-16
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Publication No.: US20240170038A1Publication Date: 2024-05-23
- Inventor: Hyun Yoo Lee , Smruti Subhash Jhaveri , Kang-Yong Kim
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G11C11/406
- IPC: G11C11/406

Abstract:
Described apparatuses and methods relate to adaptive refresh staggering for a memory system that may support a nondeterministic protocol. To help manage power-delivery networks in a memory system, a memory device can include logic that can be programmed to stagger the start of refresh operations for each die upon receiving a command to enter a lower-power mode, such as self-refresh. The staggered start can be implemented at a channel level, a package level, or both. The programming sets a delay for each die so that initiation of refresh operations is staggered. Thus, a first die can initiate refresh operations when a command to enter the lower-power mode is received (e.g., approximately zero delay). However, initiation of refresh operations for subsequent dies (e.g., “after” the first die) is delayed, which can reduce peak current draw and power consumption.
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