Invention Publication
- Patent Title: Method for Forming a Semiconductor Device
-
Application No.: US18524355Application Date: 2023-11-30
-
Publication No.: US20240178051A1Publication Date: 2024-05-30
- Inventor: Anabela Veloso , Rongmei Chen , An De Keersgieter , Geert Eneman , Philippe Matagne
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Priority: EP 210562.9 2022.11.30
- Main IPC: H01L21/74
- IPC: H01L21/74 ; H01L21/768

Abstract:
A method includes: forming a structure on a frontside of a substrate, the structure including a first and a second source/drain body located in a first and a second source/drain region, respectively, and a channel body including a channel layer extending between the first and second source/drain bodies; forming a trench beside the first source/drain region by etching the substrate such that a lower portion of the trench undercuts the first source/drain region; forming a liner on the trench; forming an opening in the liner underneath the first source/drain region; and forming a dummy interconnect in the trench; where the method further includes exposing the dummy interconnect from a backside of the substrate; removing the dummy interconnect selectively to the liner; and forming a buried interconnect of a conductive material in the trench, where the buried interconnect is connected to the first source/drain body via the opening in the liner.
Information query
IPC分类: