Invention Publication
- Patent Title: METHOD OF MANUFACTURING SUBSTRATES FOR SEMICONDUCTOR DEVICES, CORRESPONDING PRODUCT AND SEMICONDUCTOR DEVICE
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Application No.: US18516707Application Date: 2023-11-21
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Publication No.: US20240178105A1Publication Date: 2024-05-30
- Inventor: Roberto TIZIANI , Mauro MAZZOLA
- Applicant: STMICROELECTRONICS S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMICROELECTRONICS S.r.l.
- Current Assignee: STMICROELECTRONICS S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Priority: IT 2022000024678 2022.11.30
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L21/48 ; H01L21/56 ; H01L23/31

Abstract:
Electrically insulating material such as an epoxy resin is molded onto a sculptured, electrically conductive leadframe structure comprising a pattern of electrically conductive formations. The electrically insulating material penetrates into spaces between electrically conductive formations in the pattern of electrically conductive formations to provide a pre-molded leadframe structure configured to have at least one semiconductor die arranged thereon. The pre-molded leadframe structure has opposed first and second surfaces and a pre-molded leadframe thickness between the first surface and the second surface. The sculptured, electrically conductive leadframe structure comprises one or more connection formations connected with electrically conductive formations in the pattern of electrically conductive formations. The connection formation or formations have a first thickness equal to the thickness between the first surface and the second surface. The thickness of the connection formation or formations is reduced from the first thickness to a second, reduced uniform thickness with exposed wettable flanks formed in the electrically conductive formations facing the connection formation or formations with reduced thickness.
Information query
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