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    SEMICONDUCTOR DEVICE AND CORRESPONDING METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND CORRESPONDING METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20240371738A1

    公开(公告)日：2024-11-07

    申请号：US18774478

    申请日：2024-07-16

    Applicant: STMicroelectronics S.r.l.

    Inventor： Roberto TIZIANI

    IPC: H01L23/498 ,  H01L23/00 ,  H01L23/15 ,  H01L23/31 ,  H01L23/488 ,  H01L23/495 ,  H01L23/522 ,  H01L23/538

    Abstract: A packaged semiconductor device includes a substrate having a first surface and a second surface opposite the first surface. At least one semiconductor die is mounted at the first surface of the substrate. Electrically-conductive leads are arranged around the substrate, and electrically-conductive formations couple the at least one semiconductor die to selected leads of the electrically-conductive leads. A package molding material is molded onto the at least one semiconductor die, onto the electrically-conductive leads and onto the electrically-conductive formations. The package molding material leaves the second surface of the substrate uncovered by the package molding material. The substrate is formed by a layer of electrically-insulating material.

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, COMPONENT FOR USE THEREIN AND CORRESPONDING SEMICONDUCTOR DEVICE
    2.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, COMPONENT FOR USE THEREIN AND CORRESPONDING SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220199500A1

    公开(公告)日：2022-06-23

    申请号：US17550925

    申请日：2021-12-14

    Applicant: STMicroelectronics S.r.l.

    Inventor： Mauro MAZZOLA ,  Roberto TIZIANI

    IPC: H01L23/495 ,  H01L21/48

    Abstract: A leadframe includes a pattern of electrically-conductive formations with one or more sacrificial connection formations extending bridge-like between a pair of electrically-conductive formations. The sacrificial connection formation or formations are formed at one of the first surface and the second surface of the leadframe and have a thickness less than the leadframe thickness between the first surface and the second surface. A filling of electrically-insulating material is molded between the electrically-conductive formations of the leadframe, with electrically-insulating material molded between the connection formation(s) and the other surface of the leadframe. The sacrificial connection formation(s) counter deformation and displacement of parts during formation and pre-molding of the leadframe.

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE
    3.
    发明申请
    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210305191A1

    公开(公告)日：2021-09-30

    申请号：US17199340

    申请日：2021-03-11

    Applicant: STMICROELECTRONICS S.r.l.

    Inventor： Roberto TIZIANI ,  Guendalina CATALANO

    IPC: H01L23/00 ,  H01L21/56 ,  H01L23/495

    Abstract: A method comprises molding laser direct structuring material onto at least one semiconductor die, forming resist material on the laser direct structuring material, producing mutually aligned patterns of electrically-conductive formations in the laser direct structuring material and etched-out portions of the resist material having lateral walls sidewise of said electrically-conductive formations via laser beam energy, and forming electrically-conductive material at said etched-out portions of the resist material, the electrically-conductive material having lateral confinement surfaces at said lateral walls of said etched-out portions of the resist material.

    METHOD OF MANUFACTURING SUBSTRATES FOR SEMICONDUCTOR DEVICES, CORRESPONDING PRODUCT AND SEMICONDUCTOR DEVICE
    5.
    发明公开
    METHOD OF MANUFACTURING SUBSTRATES FOR SEMICONDUCTOR DEVICES, CORRESPONDING PRODUCT AND SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20240178105A1

    公开(公告)日：2024-05-30

    申请号：US18516707

    申请日：2023-11-21

    Applicant: STMICROELECTRONICS S.r.l.

    Inventor： Roberto TIZIANI ,  Mauro MAZZOLA

    IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

    CPC classification number: H01L23/49541 ,  H01L21/4828 ,  H01L21/56 ,  H01L23/3107 ,  H01L24/32 ,  H01L2224/32245

    Abstract: Electrically insulating material such as an epoxy resin is molded onto a sculptured, electrically conductive leadframe structure comprising a pattern of electrically conductive formations. The electrically insulating material penetrates into spaces between electrically conductive formations in the pattern of electrically conductive formations to provide a pre-molded leadframe structure configured to have at least one semiconductor die arranged thereon. The pre-molded leadframe structure has opposed first and second surfaces and a pre-molded leadframe thickness between the first surface and the second surface. The sculptured, electrically conductive leadframe structure comprises one or more connection formations connected with electrically conductive formations in the pattern of electrically conductive formations. The connection formation or formations have a first thickness equal to the thickness between the first surface and the second surface. The thickness of the connection formation or formations is reduced from the first thickness to a second, reduced uniform thickness with exposed wettable flanks formed in the electrically conductive formations facing the connection formation or formations with reduced thickness.

    METHOD OF MANUFACTURING ELECTRONIC DEVICES AND CORRESPONDING ELECTRONIC DEVICE
    7.
    发明申请
    METHOD OF MANUFACTURING ELECTRONIC DEVICES AND CORRESPONDING ELECTRONIC DEVICE 有权

    公开(公告)号：US20220352057A1

    公开(公告)日：2022-11-03

    申请号：US17729452

    申请日：2022-04-26

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Pte Ltd

    Inventor： Roberto TIZIANI ,  Laurent HERARD

    IPC: H01L23/498 ,  H01L21/48 ,  H01L23/13

    Abstract: A substrate includes electrically-conductive tracks. A semiconductor chip is arranged on the substrate and electrically coupled to selected ones of the electrically-conductive tracks. Containment structures are provided at selected locations on the electrically-conductive tracks, where the containment structures have respective perimeter walls defining respective cavities. Each cavity is configured to accommodate a base portion of a pin holder. These pin holders are soldered to the electrically-conductive tracks within the cavities defined by the containment structures. Each containment structure may be formed by a ring of resist material configured to receive solder and maintain the pin holders in a desired alignment position.

    SEMICONDUCTOR DEVICE AND CORRESPONDING METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND CORRESPONDING METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220102258A1

    公开(公告)日：2022-03-31

    申请号：US17487772

    申请日：2021-09-28

    Applicant: STMicroelectronics S.r.l.

    Inventor： Roberto TIZIANI

    IPC: H01L23/498 ,  H01L23/495 ,  H01L23/15

    Abstract: A packaged semiconductor device includes a substrate having a first surface and a second surface opposite the first surface. At least one semiconductor die is mounted at the first surface of the substrate. Electrically-conductive leads are arranged around the substrate, and electrically-conductive formations couple the at least one semiconductor die to selected leads of the electrically-conductive leads. A package molding material is molded onto the at least one semiconductor die, onto the electrically-conductive leads and onto the electrically-conductive formations. The package molding material leaves the second surface of the substrate uncovered by the package molding material. The substrate is formed by a layer of electrically-insulating material.

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