Disclosed is a source driver IC including a first latch circuit configured to sample image data, a second latch circuit configured to latch and output the sampled image data at a rising edge of a latch enable signal, a latch enable signal output control circuit configured to output the latch enable signal at a first timing or second timing according to a timing setting signal, a digital-to-analog converter configured to convert the image data into an analog data voltage, an output buffer circuit configured to amplify and output the data voltage in synchronization with the latch enable signal, and a Mux circuit configured to be turned on during a period of a low level of a source output enable signal to output the data voltage to each channel.