发明公开
- 专利标题: OUTPUT DETECTION CIRCUIT
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申请号: US18155490申请日: 2023-01-17
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公开(公告)号: US20240201724A1公开(公告)日: 2024-06-20
- 发明人: HIROYUKI KIMURA
- 申请人: WILL SEMICONDUCTOR (SHANGHAI) CO. LTD.
- 申请人地址: CN SHANGHAI
- 专利权人: WILL SEMICONDUCTOR (SHANGHAI) CO. LTD.
- 当前专利权人: WILL SEMICONDUCTOR (SHANGHAI) CO. LTD.
- 当前专利权人地址: CN SHANGHAI
- 优先权: CN 2211607770.3 2022.12.14
- 主分类号: G05F3/26
- IPC分类号: G05F3/26 ; G05F1/46
摘要:
The disclosure: a positive mirror FET, through which a positive mirror current that is proportional to a positive-direction current in currents of an output FET in positive and negative directions is made to flow; a first operational amplifier, receiving a constant voltage at one end, receiving an upstream side voltage regarding the positive mirror current of the positive mirror FET at the other end, and outputting a voltage corresponding to the upstream side voltage regarding the positive mirror current of the positive mirror FET by converting an output voltage into a current and feeding back the current to the other end; a negative mirror FET, through which a negative mirror current that is proportional to a negative-direction current in the currents of the output FET in positive and negative directions is made to flow; and a second operational amplifier, receiving a constant voltage at one end, receiving an upstream side voltage regarding the negative mirror current of the negative mirror FET at the other end, and outputting a voltage corresponding to the upstream side voltage regarding the negative mirror current of the negative mirror FET by converting an output voltage into a current and feeding back the current to the other end. A detection value is output based on an output current obtained by adding a positive output current corresponding to the output of the first operational amplifier and a negative output current corresponding to the output of the second operational amplifier.
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