The array base plate includes a plurality of sub-pixels that are arranged in an array; each of the sub-pixels includes a light shielding layer, a semiconductor layer, a grid layer, a source-drain layer and a pixel electrode layer that are arranged in layer configuration on the substrate sequentially; the semiconductor layer includes a first contacting part, a first channel part, a doping part, a second channel part and a second contacting part that are sequentially connected; the grid layer includes a first grid electrode and a second grid electrode; the source-drain layer includes a first electrode and a second electrode; and an orthographic projection of the light shielding layer on the substrate at least covers orthographic projections on the substrate of the first channel part, the second channel part and a part of the first contacting part.