Invention Publication
- Patent Title: ACCESSING DATA USING ERROR CORRECTION OPERATION(S) TO REDUCE LATENCY AT A MEMORY SUB-SYSTEM
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Application No.: US18655091Application Date: 2024-05-03
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Publication No.: US20240296092A1Publication Date: 2024-09-05
- Inventor: Vamsi Pavan Rayaprolu , Dung Viet Nguyen , Zixiang Loh , Sampath K. Ratnam , Patrick R. Khayat , Thomas Herbert Lentz
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Main IPC: G06F11/10
- IPC: G06F11/10
Abstract:
A request to access data programmed to a memory sub-system is received. A determination is made of whether a memory device that stores the data referenced by the request satisfies a weak memory device criterion in view of a quality rating for the device. In response to a determination that the memory device satisfies the weak memory device criterion, an error correction operation to access the data is performed in accordance with the request.
Information query
