Invention Publication
- Patent Title: MATCHER, SUBSTRATE PROCESSING APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM
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Application No.: US18436809Application Date: 2024-02-08
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Publication No.: US20240312764A1Publication Date: 2024-09-19
- Inventor: Tsuyoshi TAKEDA , Daisuke HARA
- Applicant: Kokusai Electric Corporation
- Applicant Address: JP Tokyo
- Assignee: Kokusai Electric Corporation
- Current Assignee: Kokusai Electric Corporation
- Current Assignee Address: JP Tokyo
- Priority: JP 23042715 2023.03.17
- Main IPC: H01J37/32
- IPC: H01J37/32 ; H03H7/38

Abstract:
There is provided a technique capable of sufficiently stabilizing a generation of a plasma by avoiding an improper impedance matching. There is provided a technique that includes: an input structure configured to receive a high frequency power, an output structure configured to output the high frequency power; a matching structure containing a variable inductor with a variable inductance; and a variable inductance regulator capable of varying the inductance of the variable inductor.
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