- 专利标题: MEMORY STRUCTURE WITH FERROMAGNETIC ELECTRODE
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申请号: US18748476申请日: 2024-06-20
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公开(公告)号: US20240341200A1公开(公告)日: 2024-10-10
- 发明人: Wei-Jen CHEN , Ya-Jui TSOU , Chee-Wee LIU , Shao-Yu LIN , Chih-Lin WANG
- 申请人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. , NATIONAL TAIWAN UNIVERSITY
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,NATIONAL TAIWAN UNIVERSITY
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,NATIONAL TAIWAN UNIVERSITY
- 当前专利权人地址: TW Hsinchu; TW TAIPEI
- 主分类号: H10N52/80
- IPC分类号: H10N52/80 ; H10B61/00 ; H10N52/00 ; H10N52/01
摘要:
A memory structure comprises a dielectric layer, a first ferromagnetic bottom electrode, a second ferromagnetic bottom electrode, an SOT channel layer, and an MTJ structure. The dielectric layer is over the substrate. The first ferromagnetic bottom electrode extends through the dielectric layer. The second ferromagnetic bottom electrode extends through the dielectric layer, and is spaced apart from the first ferromagnetic bottom electrode. The SOT channel layer extends from the first ferromagnetic bottom electrode to the second ferromagnetic bottom electrode. The MTJ structure is over the SOT channel layer.
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