Disclosed is a TFET with an OR-AND logic function. By arranging a horizontal channel and a vertical channel in different directions, three gates are not connected and will not be affected by each other, and can control the current of a whole channel jointly; when a first gate and a second gate are both at a high level, the TFET will be turned on, and when the first gate and a third gate are both at a high level, the TFET will also be turned on; the horizontal channel not only isolates the second gate from the third gate, but also reduces the strength of coupling between the second gate and the third gate, so only a small current passes through the horizontal channel when the second gate and the third gate are both at a high level, and the TFET will not be turned on at this moment.