- 专利标题: DYNAMIC DIE-TO-DIE SERIAL LANE CONFIGURATION
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申请号: US18302535申请日: 2023-04-18
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公开(公告)号: US20240354275A1公开(公告)日: 2024-10-24
- 发明人: Kunal DESAI , Deepak Kumar AGARWAL
- 申请人: QUALCOMM INCORPORATED
- 申请人地址: US CA SAN DIEGO
- 专利权人: QUALCOMM INCORPORATED
- 当前专利权人: QUALCOMM INCORPORATED
- 当前专利权人地址: US CA SAN DIEGO
- 主分类号: G06F13/42
- IPC分类号: G06F13/42 ; G06F11/07
摘要:
A die-to-die serial data link may be dynamically configured to exclude lanes associated with data errors. In a test mode, data may be transmitted from a first die to a second die over lanes of the link. In the second die, data received on the link in the test mode may be compared with an expected data pattern to detect any bit mismatches. When there are no more than a threshold number of mismatched bits, a receive path in the second die may be configured to use all of the lanes. When there are more than the threshold number of mismatched bits, a sub-group of the lanes that are not associated with mismatched bits may be determined, and the receive path in the second die may be configured to use the sub-group of lanes. In the first die, a transmit path may be configured to use the sub-group of lanes.
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