An apparatus comprises a discrete-time analog front-end circuit. The discrete-time analog front-end circuit includes a sample and hold circuit, a discrete-time linear equalizer circuit having an input coupled to an output of the sample and hold circuit, and a discrete-time programmable gain amplifier circuit having an input coupled to an output of the discrete-time linear equalizer circuit. The sample and hold circuit is to generate a discrete-time modulated signal at least partially based on a continuous-time modulated signal. The discrete-time linear equalizer circuit is to generate an equalized discrete-time modulated signal at least partially based on the discrete-time modulated signal. The discrete-time programmable gain amplifier circuit is to generate an amplified equalized discrete-time modulated signal at least partially based on the equalized discrete-time modulated signal. The discrete-time analog front-end circuit may include a quantizer circuit having an input coupled to an output of the discrete-time programmable gain amplifier circuit.