发明公开
- 专利标题: LATCH-UP PREVENTION
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申请号: US18768357申请日: 2024-07-10
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公开(公告)号: US20240363759A1公开(公告)日: 2024-10-31
- 发明人: Shih-Cheng Chen , Kuo-Cheng Chiang , Zhi-Chang Lin
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址: TW Hsinchu
- 主分类号: H01L29/786
- IPC分类号: H01L29/786 ; H01L21/02 ; H01L21/8238 ; H01L27/092 ; H01L29/06 ; H01L29/423 ; H01L29/66
摘要:
A semiconductor device according to the present disclosure includes an active region including a channel region and a source/drain region adjacent the channel region, a vertical stack of channel members over the channel region, a gate structure over and around the vertical stack of channel members, a bottom dielectric feature over the source/drain region, a source/drain feature over the bottom dielectric feature, and a germanium layer disposed between the bottom dielectric feature and the source/drain region.
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