The application relates to the field of integrated circuit design and discloses a digital phase interpolator, comprising: a first delay unit, a pre-interpolating unit, a second delay unit, and a phase interpolating unit; wherein each interpolation branch comprises a pre-interpolating unit and a re-interpolating unit. For two input signals with preset phase differences, the digital phase interpolator performs two interpolation processes, one at the pre-interpolating unit and the other at the phase interpolating unit. This distributed quadratic interpolation reduces the task of the phase interpolation unit, helps to reduce the number of stages of the phase interpolating unit, reduces the input load, reduces the overall power consumption and the overall area, ensures the rationality of its own power consumption, and improves the linearity of phase interpolation to some extent.