Invention Application
- Patent Title: MEMORY DEVICE THAT INCLUDES A DUTY CORRECTION CIRCUIT, MEMORY CONTROLLER THAT INCLUDES A DUTY SENSING CIRCUIT, AND STORAGE DEVICE THAT INCLUDES A MEMORY DEVICE
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Application No.: US18781289Application Date: 2024-07-23
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Publication No.: US20240379141A1Publication Date: 2024-11-14
- Inventor: TONGSUNG KIM , YOUNGMIN JO , MANJAE YANG , CHIWEON YOON , JUNHA LEE , BYUNGHOON JEONG
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR SUWON-SI
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR SUWON-SI
- Priority: KR10-2021-0008911 20210121
- Main IPC: G11C7/22
- IPC: G11C7/22 ; G06F1/04 ; G06F3/06 ; G11C5/14 ; G11C29/02
Abstract:
A storage device includes a plurality of memory chips and a chip. The plurality of memory chips includes a first memory chip configured to generate a first signal based on a first clock signal, and a second memory chip configured to generate a second signal based on a second clock signal. The chip is configured to receive the first and second signals and generate and output a first and second comparison signal based on a duty cycle of the first and second signals. The first memory chip is further configured to generate a first corrected signal by adjusting a duty cycle of the first clock signal based on the first comparison signal, and the second memory chip is further configured to generate a second corrected signal by adjusting a duty cycle of the second clock signal based on the second comparison signal.
Information query
