Invention Application
- Patent Title: BIT LINE SENSE AMPLIFIER AND MEMORY DEVICE INCLUDING THE SAME
-
Application No.: US18784746Application Date: 2024-07-25
-
Publication No.: US20240379151A1Publication Date: 2024-11-14
- Inventor: Seongjin Cho
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Priority: KR10-2021-0136693 20211014
- Main IPC: G11C11/4091
- IPC: G11C11/4091 ; G11C11/4076 ; G11C11/408 ; G11C11/4094 ; G11C11/4096

Abstract:
A bit line sense amplifier includes a first inverter having an output terminal connected to a complementary sensing bit line, a second inverter having an output terminal connected to a sensing bit line, a first offset element connecting a bit line to the complementary sensing bit line and a second offset element connecting a complementary bit line to the sensing bit line, in response to an offset cancellation signal. During a first time interval, the first offset element and the second offset element are turned off and a capacitor of a first memory cell is connected to the bit line. During a second time interval after the first time interval, the first offset element and the second offset element are turned on and the capacitor of the first memory cell is disconnected from the bit line.
Information query
IPC分类: