Provided is a semiconductor device whch includes: a 1st source/drain region connected to a 1st channel structure; a 2nd source/drain region, above the 1st source/drain region, connected to a 2nd channel structure above the 1st channel structure; a channel isolation layer between the 1st channel structure and the 2nd channel structure; a source/drain isolation layer between the 1st source/drain region and the 2nd source/drain region; and a blocking structure between the channel isolation layer and the source/drain isolation layer, wherein an entire width of the blocking structure in a channel-length direction is verically below a lateral edge portion of the 2nd source/drain region.