A semiconductor device comprising: a substrate; a first lower pattern on the substrate; a second lower pattern on the first lower pattern; channel patterns on the second lower pattern; a first field insulating layer on a first side surface of the first lower pattern; a second field insulating layer on a second side surface of the first lower pattern; a buried insulating structure on the first field insulating layer and on side surfaces of the channel patterns; a protective layer on the second field insulating layer; source/drain patterns on sides of each of the channel patterns; and a gate electrode extending around the channel patterns and the buried insulating structure, wherein the protective layer comprises: a protective insulating layer between the first lower pattern and the second lower pattern, and between the gate electrode and the second field insulating layer; and a protective liner extending around the protective insulating layer.