Invention Application
- Patent Title: EXCEPTION LIST COMPRESSION FOR LOGICAL-TO-PHYSICAL TABLES
-
Application No.: US18642030Application Date: 2024-04-22
-
Publication No.: US20240385958A1Publication Date: 2024-11-21
- Inventor: David Aaron PALMER
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F12/02
- IPC: G06F12/02

Abstract:
In some implementations, a memory apparatus may compress a physical page table associated with a logical-to-physical (L2P) table, to obtain a compressed version of the physical page table, wherein the physical page table is associated with logical block address (LBA) and physical address pairs, wherein the compressed version is associated with a set of groups of LBAs and an exception list, and wherein the compressed version includes an indication of physical addresses associated with respective starting LBAs included in the set of groups and includes sequentiality indications for respective groups from the set of groups. The memory apparatus may receive, from a host system, a command indicating an LBA that is associated with the physical page table. The memory apparatus may perform a lookup operation using the compressed version of the physical page table to identify a physical address associated with the LBA.
Information query