公开(公告)号：US20240385958A1

公开(公告)日：2024-11-21

申请号：US18642030

申请日：2024-04-22

Applicant: Micron Technology, Inc.

Inventor： David Aaron PALMER

IPC: G06F12/02

Abstract: In some implementations, a memory apparatus may compress a physical page table associated with a logical-to-physical (L2P) table, to obtain a compressed version of the physical page table, wherein the physical page table is associated with logical block address (LBA) and physical address pairs, wherein the compressed version is associated with a set of groups of LBAs and an exception list, and wherein the compressed version includes an indication of physical addresses associated with respective starting LBAs included in the set of groups and includes sequentiality indications for respective groups from the set of groups. The memory apparatus may receive, from a host system, a command indicating an LBA that is associated with the physical page table. The memory apparatus may perform a lookup operation using the compressed version of the physical page table to identify a physical address associated with the LBA.

公开(公告)号：US20240370365A1

公开(公告)日：2024-11-07

申请号：US18643514

申请日：2024-04-23

Applicant: Micron Technology, Inc.

Inventor： David Aaron PALMER

IPC: G06F12/02

Abstract: In some implementations, a memory apparatus may receive a command indicating a logical block address (LBA) that is associated with a logical-to-physical (L2P) table. The memory apparatus may perform a lookup operation associated with a compressed version of an address range of the L2P table to identify a physical address in non-volatile memory associated with the LBA, wherein the compressed version is stored in a volatile memory of the memory apparatus, wherein the compressed version is associated with an exception list that indicates physical addresses for respective LBAs, included in the address range, that are associated with non-sequential physical addresses, and wherein the compressed version is associated with a binary tree that indicates locations in the exception list associated with the respective LBAs. The memory apparatus may perform, based on the command, an action associated with the physical address.

公开(公告)号：US20240264746A1

公开(公告)日：2024-08-08

申请号：US18421287

申请日：2024-01-24

Applicant: Micron Technology, Inc.

Inventor： David Aaron PALMER

IPC: G06F3/06

CPC classification number: G06F3/0611 ,  G06F3/0653 ,  G06F3/0679

Abstract: In some implementations, a memory device may detect that data is to be written for a set of temperature profiles. The memory device may write, at respective temperatures corresponding to the set of temperature profiles, multiple copies of the data. The memory device may receive, from a host device, a read request associated with the data. The memory device may detect, based on receiving the read request, a current temperature of the memory device. The memory device may read a copy, from the multiple copies, that is associated with a temperature profile, from the set of temperature profiles, that corresponds to the current temperature of the memory device. The memory device may provide, to the host device, the copy of the data.