Provided is a semiconductor package including a redistribution substrate, a bridge chip on the redistribution substrate, a first conductive post and a second conductive post on the redistribution substrate and spaced apart from the bridge chip, a first semiconductor chip on the bridge chip and the first conductive post, a second semiconductor chip on the bridge chip and the second conductive post, and a first mold layer on the redistribution substrate, the bridge chip, the first semiconductor chip, and the second semiconductor chip, wherein the bridge chip includes a bridge die connected to an active surface of the first semiconductor chip and an active surface of the second semiconductor chip, a second mold layer on the bridge die, a penetration via adjacent to the bridge die and vertically penetrating the second mold layer, and a capacitor disposed a bottom surface of the second mold layer and connected to the penetration via.