A semiconductor device including a substrate having a cell array region and a contact region, a gate stack structure positioned in the cell array region, and including a plurality of interlayer insulation layers and a plurality of gate electrodes alternately stacked on the substrate, a gate pattern stack structure positioned in the contact region, and including a plurality of gate patterns extending from the plurality of gate electrodes, and a plurality of insulation layers alternately stacked with the plurality of gate patterns, a channel structure penetrating the gate stack structure and extending in a direction crossing or intersecting the substrate, and a gate contact portion in the contact region, and penetrating at least a portion of the gate pattern stack structure to be electrically connected to the gate pattern, the plurality of insulation layers including a first insulation layer and a second insulation layer, the second insulating layer including a material different from a material included in the first insulation layer.