Invention Application
- Patent Title: METHOD AND APPARATUS FOR DETECTING POWER-ON RESET THRESHOLD
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Application No.: US18203737Application Date: 2023-05-31
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Publication No.: US20240402241A1Publication Date: 2024-12-05
- Inventor: Sandor PETENYI , Lukas BURIAN
- Applicant: STMicroelectronics International N.V.
- Applicant Address: CH Geneva
- Assignee: STMicroelectronics International N.V.
- Current Assignee: STMicroelectronics International N.V.
- Current Assignee Address: CH Geneva
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R27/08

Abstract:
Disclosed herein is a testing circuit for indirectly testing generation of a power-on-reset signal within an integrated circuit (IC). The testing circuit includes a switch configured to selectively disconnect an internal circuit from a test pin of the IC in response to start-up of the IC, a plurality of resistors connected between the test pin and a respective plurality of switches that are configured to selectively connect ones of the plurality of resistors to ground in response to corresponding control signals, and a control circuit configured to produce, at the test pin, a resistance indicative of status of generation of the POR signal by selectively operating the plurality of switches based upon statuses of a plurality of signals from which the POR signal is generated.
Public/Granted literature
- US2237695A Sounding board for pianos Public/Granted day:1941-04-08
Information query