HIGH PERFORMANCE TRACE OFFLOAD CIRCUIT ARCHITECTURE
Abstract:
An integrated circuit includes a compute circuit and a trace data mover circuit coupled to the compute circuit. The trace data mover circuit is configured to convey trace data generated by the compute circuit to a destination circuit. The trace data mover circuit includes a controller circuit configured to receive a stream of trace data from the compute circuit and generate instructions for writing the trace data. The trace data mover circuit includes a writer circuit configured to write the trace data to the destination circuit responsive to the instructions generated by the controller circuit.
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