Invention Application
- Patent Title: DEVICE FOR MONITORING INTER-INTEGRATED CIRCUIT BUS
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Application No.: US18537242Application Date: 2023-12-12
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Publication No.: US20250004978A1Publication Date: 2025-01-02
- Inventor: Chien-Hua Wang , Pao-Kang Mo , Shih-Feng Tseng
- Applicant: Alpha Networks Inc.
- Applicant Address: TW Hsinchu
- Assignee: Alpha Networks Inc.
- Current Assignee: Alpha Networks Inc.
- Current Assignee Address: TW Hsinchu
- Priority: TW112124083 20230628
- Main IPC: G06F13/42
- IPC: G06F13/42

Abstract:
A device includes a signal-edge detector, an anomaly detector and a reset-interrupt generator. The signal-edge detector outputs a timing-start signal when detecting that a logic level of an SDA signal from an SDA line of an I2C bus changes from logical high to logical low, and outputs a timing-reset signal when detecting that the logic level changes from logical low to logical high. Upon receiving the timing-start signal, the anomaly detector starts to time a timing duration, and outputs an error signal when the timing duration reaches a preset time duration.
Upon receiving the timing-reset signal, the anomaly detector resets the timing duration to zero. In response to receipt of the error signal, the reset-interrupt generator outputs an interrupt signal to a processor for removing an abnormal state, or outputs a pin-reset signal to an optical module to reset a pin connected to the SDA line.
Upon receiving the timing-reset signal, the anomaly detector resets the timing duration to zero. In response to receipt of the error signal, the reset-interrupt generator outputs an interrupt signal to a processor for removing an abnormal state, or outputs a pin-reset signal to an optical module to reset a pin connected to the SDA line.
Information query