Invention Application
- Patent Title: VARYING MEMORY ERASE DEPTH ACCORDING TO BLOCK CHARACTERISTICS
-
Application No.: US18933971Application Date: 2024-10-31
-
Publication No.: US20250060875A1Publication Date: 2025-02-20
- Inventor: Sriteja Yamparala , Tawalin Opastrakoon
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A method can include identifying one or more candidate memory blocks that are available for garbage collection, determining a respective erase depth level for each candidate memory block based on one or more block characteristics of the candidate memory block, erasing the candidate memory blocks, wherein each of the candidate memory blocks is erased in accordance with the respective erase depth level determined for the candidate memory block, receiving a request to write data subsequent to erasing the candidate memory blocks, and, responsive to receiving the request to write data, selecting a first memory block from the erased candidate memory blocks in accordance with the respective erase depth level of each of the erased candidate memory blocks. The block characteristics of the candidate memory block can include a program erase count and/or a temperature of the candidate memory block.
Information query