发明授权
US3959666A Logic level translator 失效
逻辑电平转换器

Logic level translator
摘要:
A logic level translator uses a current switch, a current source and a plurality of cathode followers to convert T.sup.2 L and DTL level binary signals into CML and ECL level binary signals. The translator provides isolation between the T.sup.2 L ground and the CML ground so that noise in the CML signals is reduced.
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