发明授权
US3971922A Circuit arrangement for digitally processing a given number of channel
signals
失效
用于数字处理给定数量的信道信号的电路装置
- 专利标题: Circuit arrangement for digitally processing a given number of channel signals
- 专利标题(中): 用于数字处理给定数量的信道信号的电路装置
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申请号: US528506申请日: 1974-11-29
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公开(公告)号: US3971922A公开(公告)日: 1976-07-27
- 发明人: Maurice Georges Bellanger , Jacques Lucien Daguet
- 申请人: Maurice Georges Bellanger , Jacques Lucien Daguet
- 申请人地址: FR Paris
- 专利权人: Telecommunications Radioelectriques et Telephoniques T.R.T.
- 当前专利权人: Telecommunications Radioelectriques et Telephoniques T.R.T.
- 当前专利权人地址: FR Paris
- 主分类号: H03H17/04
- IPC分类号: H03H17/04 ; H04J1/05 ; G06F7/38
摘要:
An arrangement for digitally processing a given number of analog channel signals, more particularly a digital multiplexer and demultiplexer provided with a number of signal paths each comprising a recursive digital filter and delay circuits arranged in cascade therewith, said filter circuits having an amplitude-frequency characteristic of a lowpass filter having a cut-off frequency which is equal to half the bandwidth of a channel signal and a phase-frequency characteristic which is such that the difference between such a phase-frequency characteristic and the phase-frequency characteristic of a reference digital filter has a sawtooth-shaped variation, the slope of the sawtooth being opposite to the slope of the cooperating delay circuit. The arrangement furthermore comprises in cascade a discrete Fourier transformer connected to the signal paths.
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