发明授权
US3980971A Modulator for hybrid modulation by more and less significant digital
signals in succession in each clock interval and counterpart
demodulator
失效
用于混合调制的调制器通过在每个时钟间隔和对应的解调器中连续的越来越少的数字信号进行混合调制
- 专利标题: Modulator for hybrid modulation by more and less significant digital signals in succession in each clock interval and counterpart demodulator
- 专利标题(中): 用于混合调制的调制器通过在每个时钟间隔和对应的解调器中连续的越来越少的数字信号进行混合调制
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申请号: US500905申请日: 1974-08-27
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公开(公告)号: US3980971A公开(公告)日: 1976-09-14
- 发明人: Yoichi Sato
- 申请人: Yoichi Sato
- 申请人地址: JA Tokyo
- 专利权人: Nippon Electric Company, Ltd.
- 当前专利权人: Nippon Electric Company, Ltd.
- 当前专利权人地址: JA Tokyo
- 优先权: JA48-99933 19730905
- 主分类号: H03D1/00
- IPC分类号: H03D1/00 ; H03D1/22 ; H04B14/00 ; H04B14/02 ; H04B14/04 ; H04L27/34 ; H04L27/36 ; H03C1/02
摘要:
A modulator for quadrature amplitude modulating a carrier signal by a first and a second signal derived from an input analog signal includes an A/D converter for converting the input signal to a digital signal in each clock interval and a circuit for producing an error signal representative of quantization errors of the digital signal in the respective clock intervals. The modulator comprises means for dividing the digital signal into a more and a less significant signal comprising more significant and the remaining digits of the digital signal, means for producing the first signal by arranging the more and less significant signals in succession in each clock interval, and a selectively operable inverter for producing the second signal by arranging the error signal in succession in each clock interval with the error signal left as it is and with its polarity inverted.
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