公开(公告)号：US20220247443A1

公开(公告)日：2022-08-04

申请号：US17167674

申请日：2021-02-04

申请人： INTELLIGENT FUSION TECHNOLOGY, INC.

发明人： Dan SHEN ,  Khanh PHAM ,  Tien M. NGUYEN ,  Genshe CHEN

IPC分类号： H04B1/30 ,  H04B1/04 ,  H03D1/24 ,  H03D1/22

摘要： A system for hybrid modulation and demodulation includes a transmitter and a receiver. The transmitter is configured to receive a hybrid signal of a space-ground link system (SGLS), including a first component and a second component; perform a double sideband (DSB) modulation on the first component using a carrier frequency to obtain a first waveform; perform a single sideband (SSB) modulation on the second component using the carrier frequency to obtain a second waveform; mix the first waveform and the second waveform to generate a hybrid waveform; and transmit the hybrid waveform. The receiver is configured to receive the hybrid waveform; determine the carrier frequency; separate the first waveform and the second waveform; perform a DSB demodulation on the first waveform to obtain a first demodulated signal; and perform an SSB demodulation on the second waveform to obtain a second demodulated signal.

公开(公告)号：US20210167729A1

公开(公告)日：2021-06-03

申请号：US17171490

申请日：2021-02-09

申请人： STMicroelectronics SA

发明人： Lionel VOGT

IPC分类号： H03D1/18 ,  H03D1/06 ,  H03D1/22 ,  H04L27/06 ,  G01R19/04 ,  H03D3/00 ,  H04L27/233

摘要： An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

公开(公告)号：US10951168B2

公开(公告)日：2021-03-16

申请号：US16739287

申请日：2020-01-10

申请人： STMicroelectronics SA

发明人： Lionel Vogt

IPC分类号： H03D1/18 ,  H03D1/06 ,  H03D1/22 ,  H04L27/06 ,  G01R19/04 ,  H03D3/00 ,  H04L27/233 ,  H03F3/20

摘要： An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa.

公开(公告)号：US20190356523A1

公开(公告)日：2019-11-21

申请号：US16414478

申请日：2019-05-16

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Lijun YUAN ,  Haoliang ZHENG ,  Guangliang SHANG ,  Xing YAO ,  Mingfu HAN

IPC分类号： H04L27/26 ,  H03D1/22

摘要： A demultiplexer includes a voltage boost circuit and at least one data selection output circuit. The voltage boost circuit is coupled to N second-stage selection signal input terminals and N first-stage selection signal input terminals, N is greater than or equal to 2, and N is a positive integer. Each data selection output circuit is coupled to a data input terminal, N data output terminals and the N first-stage selection signal input terminals.

公开(公告)号：US06922555B1

公开(公告)日：2005-07-26

申请号：US09389179

申请日：1999-09-02

申请人： Rishi Mohindra

发明人： Rishi Mohindra

IPC分类号： H03B27/00 ,  H03B28/00 ,  H03D1/22 ,  H03D3/00 ,  H03D7/16 ,  H04B1/26 ,  H04L27/22 ,  H04B15/00

CPC分类号： H03D7/166 ,  H03B27/00 ,  H03B28/00 ,  H03D1/2245 ,  H03D3/007 ,  H04L27/22

摘要： A phase interpolation receiver for receiving angle modulated radio frequency signals. The receiver comprises mixers for down-converting the received angle modulated signal to lower frequency signals, limiters, interpolation filters, and a demodulator. The mixers down-convert the received RF signal to a low IF intermediate frequency signal. The low IF intermediate frequency signal is limited. After further down-conversion to zero IF, using quadrature mixers, the limited signal is phase interpolated. The intermediate frequency is chosen such that the limited signal comprises an unwanted signal at twice the intermediate frequency that acts as a noise spreading signal for spectrally spreading of quantization noise generated by the limiters, and the cut-off frequency of the interpolation filters is chosen such that the unwanted signal and the spread quantization noise are suppressed.

摘要翻译： 一种用于接收角度调制的射频信号的相位插值接收器。 接收机包括用于将接收到的角度调制信号下变频为较低频率信号，限幅器，内插滤波器和解调器的混频器。 混频器将接收到的RF信号降频转换为低IF中频信号。 低IF中频信号有限。 在进一步下变频至零IF后，使用正交混频器，有限信号被相位内插。 选择中频使得受限信号包括两倍于中频的不需要的信号，其作为用于由限幅器产生的量化噪声的频谱扩展的噪声扩展信号，并且内插滤波器的截止频率被选择为 不需要的信号和扩展的量化噪声被抑制。

公开(公告)号：US6101226A

公开(公告)日：2000-08-08

申请号：US456447

申请日：1999-12-08

申请人： Gen-ichiro Ohta ,  Kazunori Inogai ,  Hiroaki Sudo ,  Fujio Sasaki

发明人： Gen-ichiro Ohta ,  Kazunori Inogai ,  Hiroaki Sudo ,  Fujio Sasaki

IPC分类号： H04B1/16 ,  H03D3/00 ,  H04B1/26 ,  H04B1/30 ,  H03D1/22

CPC分类号： H04B1/26 ,  H03D3/009 ,  H04B1/0014 ,  H04B1/0039 ,  H04B1/30 ,  H03D3/006 ,  H03D3/007

摘要： A received signal obtained from an antenna is subjected to high-frequency amplification. The amplified signal is supplied to a first bandpass filter, which extracts only signals of all the channels of a communications system concerned while filtering out other radio signals. The extracted signals are frequency-converted by using a local oscillation frequency, and only a desired wave is passed by a second bandpass filter. The desired wave is supplied to a sample-and-hold circuit, which performs sampling according to the bandwidth-limiting sampling theorem. A resulting discrete signal is supplied to an I-axis-component and Q-axis-component separating circuits, where the polarity of sample values is inverted for every other clock pulse with respect to each of the I and Q axes to thereby effect Hilbert transform. Resulting two orthogonal components on a phase plane are supplied to a complex coefficient filter.

公开(公告)号：US6026129A

公开(公告)日：2000-02-15

申请号：US824774

申请日：1997-03-26

申请人： Gen-ichiro Ohta ,  Kazunori Inogai ,  Hiroaki Sudo ,  Fujio Sasaki

发明人： Gen-ichiro Ohta ,  Kazunori Inogai ,  Hiroaki Sudo ,  Fujio Sasaki

IPC分类号： H04B1/16 ,  H03D3/00 ,  H04B1/26 ,  H04B1/30 ,  H03D1/22

CPC分类号： H04B1/26 ,  H03D3/009 ,  H04B1/0014 ,  H04B1/0039 ,  H04B1/30 ,  H03D3/006 ,  H03D3/007

摘要： A received signal obtained from an antenna is subjected to high-frequency amplification. The amplified signal is supplied to a first bandpass filter, which extracts only signals of all the channels of a communications system concerned while filtering out other radio signals. The extracted signals are frequency-converted by using a local oscillation frequency, and only a desired wave is passed by a second bandpass filter. The desired wave is supplied to a sample-and-hold circuit, which performs sampling according to the bandwidth-limiting sampling theorem. A resulting discrete signal is supplied to an I-axis-component and Q-axis-component separating circuits, where the polarity of sample values is inverted for every other clock pulse with respect to each of the I and Q axes to thereby effect Hilbert transform. Resulting two orthogonal components on a phase plane are supplied to a complex coefficient filter.

摘要翻译： 从天线获得的接收信号经受高频放大。 放大的信号被提供给第一带通滤波器，其仅提取所涉及的通信系统的所有信道的信号，同时滤除其他无线电信号。 所提取的信号通过使用本地振荡频率进行频率转换，并且只有期望的波通过第二带通滤波器。 将期望的波提供给采样保持电路，该采样保持电路根据带宽限制采样定理进行采样。 得到的离散信号被提供给I轴分量和Q轴分量分离电路，其中样本值的极性相对于I和Q轴中的每一个针对每隔一个时钟脉冲反相，从而实现希尔伯特变换 。 相位平面上产生的两个正交分量被提供给复系数滤波器。

公开(公告)号：US5914986A

公开(公告)日：1999-06-22

申请号：US682717

申请日：1996-07-29

申请人： Gen-ichiro Ohta ,  Kazunori Inogai ,  Fujio Sasaki

发明人： Gen-ichiro Ohta ,  Kazunori Inogai ,  Fujio Sasaki

IPC分类号： H03D1/22 ,  H03D7/16 ,  H04B1/12 ,  H04B1/26 ,  H04B5/00 ,  H03D3/18

CPC分类号： H04B1/0032 ,  H03D1/2245 ,  H03F3/45475 ,  H03F3/50 ,  H04B1/0003 ,  H04B1/26 ,  H04B5/0093 ,  H03D2200/0047 ,  H03D2200/005 ,  H03D2200/0082 ,  H03D7/165 ,  H03F2200/537 ,  H04B1/123

摘要： A receiving circuit mainly available in a digital modulation type communication system having a plurality of channels, which is capable of reducing power in a receiving system, simplifying the circuit and reducing the power consumption. Upside and downside frequencies corresponding to a central value between channels are separately supplied from a local frequency signal generating circuit 4 to first and second frequency converting circuits 2, 3 so that two output signals are developed with respect to one of a desired wave, upside channel and downside channel. The desired wave present in common in the first and second frequency converting circuits 2, 3 is extracted in a common wave extracting circuit 5, and a frequency offset of .omega.o existing in the output of the common wave extracting circuit 5 is removed a frequency offset circuit 6 and further an unnecessary frequency component is filtered by a filter 8. In addition, the common wave extracting circuit 5 has transformers and, using its inductances, raises the difference between the common wave and the non-common wave within the circuit to more than two times that of a prior art.

摘要翻译： PCT No.PCT / JP95 / 02448 Sec。 371日期：1996年7月29日 102（e）日期1996年7月29日PCT提交1995年11月30日PCT公布。 公开号WO96 / 17441 日期1996年6月6日主要可用于具有多个信道的数字调制型通信系统中的接收电路，其能够降低接收系统的功率，简化电路并降低功耗。 对应于通道之间的中心值的上升和下降频率从本地频率信号发生电路4分别提供给第一和第二频率转换电路2,3，使得两个输出信号相对于所需波形，上行通道 和下行通道。 在公共波提取电路5中提取在第一和第二频率转换电路2,3中共同存在的期望波，并且公共波提取电路5的输出中存在的ωo的频率偏移被去除频率偏移 电路6，另外不必要的频率分量被滤波器8滤波。此外，公共波提取电路5具有变压器，并且使用其电感将公共波与电路内的非公共波之间的差异提高到更多 是现有技术的两倍以上。

公开(公告)号：US5715530A

公开(公告)日：1998-02-03

申请号：US683759

申请日：1996-07-17

申请人： Hermann-Josef Eul

发明人： Hermann-Josef Eul

IPC分类号： H03D1/22 ,  H03D7/16 ,  H04B1/30 ,  H04B1/10

CPC分类号： H03D1/2245 ,  H03D7/165 ,  H04B1/30

摘要： In a homodyne receiver for the reception of a carrier frequency signal with time-variant carrier frequency, an auxiliary signal is modulated onto the local oscillator signal selected corresponding to the current carrier frequency. A better separation of the local oscillator signals is thereby achieved by a band-pass filtering after the conversion of the carrier frequency signal into the base band. Compared to a homodyne receiver with time-variant carrier frequency but without auxiliary modulation, the RF switch for the selection of the local oscillator signal corresponding to the current carrier frequency can be realized simple and more economical. This advantage of the homodyne receiver is of particular economic significance for employment in mass-produced articles, such as in mobile and wireless communication systems.

摘要翻译： 在用于接收具有时变载波频率的载波频率信号的零差接收机中，辅助信号被调制到对应于当前载波频率选择的本地振荡器信号上。 因此，通过在将载波频率信号转换为基带之后的带通滤波器来实现本地振荡器信号的更好的分离。 与具有时变载波频率但没有辅助调制的零差接收机相比，用于选择对应于当前载波频率的本地振荡器信号的RF开关可以简单且更经济。 零差接收机的这个优点对于在大规模生产的物品（例如移动和无线通信系统）中的使用具有特别的经济意义。

公开(公告)号：US5699204A

公开(公告)日：1997-12-16

申请号：US555362

申请日：1995-11-08

申请人： Michael Inbar

发明人： Michael Inbar

IPC分类号： G01R33/12 ,  G11B5/012 ,  G11B20/18 ,  G11B27/36 ,  G11B33/10 ,  H03D1/22 ,  G11B5/02 ,  G11B5/09

CPC分类号： H03D1/2281 ,  G01R33/1207 ,  G11B20/1816 ,  G11B27/36 ,  G11B5/012 ,  G11B33/10

摘要： An apparatus and method for demodulating an amplitude modulated read signal generated by a magnetic head of a hard disk drive. The apparatus includes a pair of serially connected track and hold circuits that receive the read signal. The track or hold state of each circuit is controlled by a phase lock loop circuit which also receives the read signal. The first track and hold circuit initially tracks the read signal to a peak value. The circuit then switches to a hold state and provides a constant output signal that corresponds to the peak voltage of the read signal. While the first track and hold circuit is in the hold state, the second track and hold circuit is in a tracking state. The second track and hold circuit tracks the output of the first circuit. Because the output of the first circuit is a constant value, the second circuit also provides a constant output signal in the tracking state. The first circuit is switched back to the tracking state to again track the amplitude of the read signal, and the second circuit is switched to the hold state. The process is repeated to create a "stepped" demodulated signal. The output signals are compared to a threshold value to detect bit errors in the signal. The constant output signals provide additional energy to the detection circuit to minimize the number of false error signals from the comparator circuit.

摘要翻译： 一种用于解调由硬盘驱动器的磁头产生的调幅读信号的装置和方法。 该装置包括一对串行连接的跟踪和保持电路，其接收读取信号。 每个电路的跟踪或保持状态由也接收读取信号的锁相环电路控制。 第一个跟踪和保持电路首先将读取的信号跟踪到一个峰值。 然后，电路切换到保持状态，并提供与读取信号的峰值电压对应的恒定输出信号。 当第一轨道和保持电路处于保持状态时，第二轨道和保持电路处于跟踪状态。 第二轨道和保持电路跟踪第一电路的输出。 由于第一电路的输出是恒定值，所以第二电路还在跟踪状态下提供恒定的输出信号。 第一电路切换回跟踪状态，以再次跟踪读信号的幅度，并将第二电路切换到保持状态。 重复该过程以产生“阶梯式”解调信号。 将输出信号与阈值进行比较，以检测信号中的位错误。 恒定输出信号为检测电路提供额外的能量以最小化来自比较器电路的错误信号的数量。