Invention Grant
- Patent Title: Synchronized multispeed transducer position indicating system
- Patent Title (中): 同步多传感器位置指示系统
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Application No.: US584376Application Date: 1975-06-06
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Publication No.: US4014014APublication Date: 1977-03-22
- Inventor: Donald H. Jones , Paul F. McNally
- Applicant: Donald H. Jones , Paul F. McNally
- Applicant Address: PA Pittsburgh
- Assignee: Contraves-Goerz Corporation
- Current Assignee: Contraves-Goerz Corporation
- Current Assignee Address: PA Pittsburgh
- Main IPC: H03M1/00
- IPC: H03M1/00 ; H03K13/02
Abstract:
A method and apparatus for synchronizing the digitized position output of a multispeed system having overlapping position indications. The output of the multispeed position indicating system is a digital output word which is a combination of the individual outputs of the various transducers. For a two speed system a digital fine position having a high degree of accuracy is provided, and a digital coarse position indication of a lesser precision is also provided wherein the least significant coarse position digit overlaps the most significant fine position digit. An adjustment is provided for adjusting the coarse digital output as a function of the most significant digit of the fine transducer output so that nonambiguous synchronized position information is provided at all times. The appropriate adjustment can be obtained by adding a fixed number of counts, such as 5, to the coarse digital position indication and then subtracting the most significant digit of the fine position indication so that when the coarse position indication is combined with the fine position indication the desired unambiguous output results. The combined position indication can be obtained by utilizing all of the fine digital position outputs and the coarse digital outputs other than the least significant digit, which overlaps the most significant digit of the fine digital output. The coarse and fine position indicators can be resolvers which are connected to the shaft to be instrumented. The outputs of these resolvers are then converted to digital signals by analog to digital converters. The fine digital signal and the modified coarse digital signal are then combined by appropriate logic.
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