发明授权
US4066880A System for pretesting electronic memory locations and automatically
identifying faulty memory sections
失效
用于预测试电子存储器位置并自动识别故障存储器部分的系统
- 专利标题： System for pretesting electronic memory locations and automatically identifying faulty memory sections
- 专利标题（中）： 用于预测试电子存储器位置并自动识别故障存储器部分的系统
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申请号： US671938申请日： 1976-03-30
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公开(公告)号： US4066880A公开(公告)日： 1978-01-03
- 发明人: Ernest J. Salley
- 申请人： Ernest J. Salley
- 申请人地址： AZ Phoenix
- 专利权人： Engineered Systems, Inc.
- 当前专利权人： Engineered Systems, Inc.
- 当前专利权人地址： AZ Phoenix
- 主分类号： G06F12/16
- IPC分类号： G06F12/16 ; G06F11/22 ; G11C11/02 ; G11C29/00 ; G11C29/20 ; G11C29/44 ; G06F11/00
摘要：
An MOS RAM read/write memory system has thirty-two 1 .times. 512 bit RAM memory chips arranged in a matrix. The system pretests all data bit locations for each address prior to the entry of any data into that address, and automatically skips an address having a faulty data bit location in it. In addition, the system functions, upon reading out of data information from the memory chips, to uniquely identify any faulty MOS RAM memory chip; so that it may be removed and replaced if desired.
公开/授权文献
- US5801712A Character processing apparatus and method 公开/授权日：1998-09-01
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