发明授权
US4111724A Method of manufacturing oxide isolated semiconductor device utilizing
selective etching technique
失效
使用选择性蚀刻技术制造氧化物分离半导体器件的方法
- 专利标题: Method of manufacturing oxide isolated semiconductor device utilizing selective etching technique
- 专利标题(中): 使用选择性蚀刻技术制造氧化物分离半导体器件的方法
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申请号: US750387申请日: 1976-12-14
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公开(公告)号: US4111724A公开(公告)日: 1978-09-05
- 发明人: Katumi Ogiue , Hiroyuki Kondo , Takashi Ishikawa , Takaaki Mori , Takahisa Nitta
- 申请人: Katumi Ogiue , Hiroyuki Kondo , Takashi Ishikawa , Takaaki Mori , Takahisa Nitta
- 申请人地址: JPX
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX
- 优先权: JPX50-151828 19751222
- 主分类号: H01L21/331
- IPC分类号: H01L21/331 ; H01L21/74 ; H01L21/76 ; H01L21/762 ; H01L23/485 ; H01L29/73 ; H01L21/306
摘要:
In the production of a semiconductor integrated circuit device including a selective oxidation step at a high temperature using a nitride film as a mask for isolating respective element regions in a semiconductor wafer with oxidized regions, electrode contact regions and active regions are successively formed in each element region to be surrounded by the oxidized regions and thin oxide films are formed on exposed surfaces of the electrode contact regions, the thin semiconductor oxide films are removed simultaneously by immersed etching, and then electrode metal layers are formed thereon. The thickness of the oxide layer on which the electrode metal layers are formed is maintained almost uniform to ensure the isolation effect. Since a buried region in each element region is required only to make partial contact with the contact region at the bottom portion, the integration density of the elements in the integrated circuit can be increased.
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