公开(公告)号：USRE31506E

公开(公告)日：1984-01-24

申请号：US183100

申请日：1980-09-02

申请人： Katumi Ogiue ,  Hiroyuki Kondo ,  Takashi Ishikawa ,  Takaaki Mori ,  Takahisa Nitta

发明人： Katumi Ogiue ,  Hiroyuki Kondo ,  Takashi Ishikawa ,  Takaaki Mori ,  Takahisa Nitta

IPC分类号： H01L21/331 ,  H01L21/74 ,  H01L21/76 ,  H01L21/762 ,  H01L23/485 ,  H01L29/73

CPC分类号： H01L23/485 ,  H01L21/743 ,  H01L21/76208 ,  H01L21/7621 ,  H01L2924/0002

摘要： In the production of a semiconductor integrated circuit device including a selective oxidation step at a high temperature using a nitride film as a mask for isolating respective element regions in a semiconductor wafer with oxidized regions, electrode contact regions and active regions are successively formed in each element region to be surrounded by the oxidized regions and thin oxide films are formed on exposed surfaces of the electrode contact regions, the thin semiconductor oxide films are removed simultaneously by immersed etching, and then electrode metal layers are formed thereon. The thickness of the oxide layer on which the electrode metal layers are formed is maintained almost uniform to ensure the isolation effect. Since a buried region in each element region is required only to make partial contact with the contact region at the bottom portion, the integration density of the elements in the integrated circuit can be increased.

公开(公告)号：US4111724A

公开(公告)日：1978-09-05

申请号：US750387

申请日：1976-12-14

申请人： Katumi Ogiue ,  Hiroyuki Kondo ,  Takashi Ishikawa ,  Takaaki Mori ,  Takahisa Nitta

发明人： Katumi Ogiue ,  Hiroyuki Kondo ,  Takashi Ishikawa ,  Takaaki Mori ,  Takahisa Nitta

IPC分类号： H01L21/331 ,  H01L21/74 ,  H01L21/76 ,  H01L21/762 ,  H01L23/485 ,  H01L29/73 ,  H01L21/306

CPC分类号： H01L23/485 ,  H01L21/743 ,  H01L21/76208 ,  H01L21/7621 ,  H01L2924/0002

摘要： In the production of a semiconductor integrated circuit device including a selective oxidation step at a high temperature using a nitride film as a mask for isolating respective element regions in a semiconductor wafer with oxidized regions, electrode contact regions and active regions are successively formed in each element region to be surrounded by the oxidized regions and thin oxide films are formed on exposed surfaces of the electrode contact regions, the thin semiconductor oxide films are removed simultaneously by immersed etching, and then electrode metal layers are formed thereon. The thickness of the oxide layer on which the electrode metal layers are formed is maintained almost uniform to ensure the isolation effect. Since a buried region in each element region is required only to make partial contact with the contact region at the bottom portion, the integration density of the elements in the integrated circuit can be increased.

公开(公告)号：US4009484A

公开(公告)日：1977-02-22

申请号：US881822

申请日：1969-12-03

申请人： Katumi Ogiue ,  Masaya Ohta ,  Shotaro Shibata

发明人： Katumi Ogiue ,  Masaya Ohta ,  Shotaro Shibata

IPC分类号： H01L21/00 ,  H01L21/205 ,  H01L21/763 ,  H01L27/06 ,  H01L27/04 ,  H01L21/20 ,  H01L29/04 ,  H01L29/167

CPC分类号： H01L27/0652 ,  H01L21/00 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/02658 ,  H01L21/763

摘要： A semiconductor device comprising monocrystalline semiconductor regions and a polycrystalline semiconductor region doped with gold and disposed between and adjacent to the monocrystalline regions. The high impedance appearing between the regions is utilized for isolating circuit elements which are formed in the monocrystalline regions.

摘要翻译： 一种半导体器件，包括单晶半导体区域和掺杂有金的多晶半导体区域，并且设置在单晶区域之间并与之相邻。 出现在区域之间的高阻抗用于隔离在单晶区域中形成的电路元件。