发明授权
US4300194A Data processing system having multiple common buses 失效
具有多条公共总线的数据处理系统

Data processing system having multiple common buses
摘要:
Multiple common buses are provided for coupling a plurality of units in a data processing system for the transfer of information therebetween. The central processing unit (CPU) allocates the multiple common buses to one of the units in response to bus requests received from various units desiring to use the common buses. Bus requests are generated in a synchronous manner by use of a timing signal originating in the CPU which is connected in series between the one or more units on each of the multiple common buses.
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