An array processor which is an integral part of a central processing unit (CPU) has a local memory which is part of main memory address space. Furthermore, the array procesor has its own port into the local memory, leaving a system bus free while the array processor is working. The array processor is controlled so that data can be transferred between the main memory and the local memory either before, during, or after operation of data manipulation hardware which is part of the array processor. This data manipulation hardware utilizes a fast multiplier, and fast add, subtract, & compare circuitry. The array processor is controlled by a 76 bit microcode extension to one sector of a number of sectors of a control store in the CPU. The microcode extension can be overriden by interrupt and other control signals generated by the CPU.