Invention Grant
US4374409A Method of and system using P and V instructions on semaphores for
transferring data among processes in a multiprocessing system
失效
用于在多处理系统中的处理之间传送数据的信号量上使用P和V指令的方法和系统
- Patent Title: Method of and system using P and V instructions on semaphores for transferring data among processes in a multiprocessing system
- Patent Title (中): 用于在多处理系统中的处理之间传送数据的信号量上使用P和V指令的方法和系统
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Application No.: US957442Application Date: 1978-11-03
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Publication No.: US4374409APublication Date: 1983-02-15
- Inventor: Jacques Bienvenu , Claude Carre , Duc L. Tuong , Henri Verdier
- Applicant: Jacques Bienvenu , Claude Carre , Duc L. Tuong , Henri Verdier
- Applicant Address: FRX Paris
- Assignee: Compagnie Honeywell Bull
- Current Assignee: Compagnie Honeywell Bull
- Current Assignee Address: FRX Paris
- Priority: FRX73.42697 19731130
- Main IPC: G06F9/46
- IPC: G06F9/46
Abstract:
Synchronization of processes in a multiprogramming/multiprocessing system is provided by P and V instructions that are executed during execution of processes and operate on data structures known as semaphores which represent processes and events. A process that performs P instruction requests data. The P instruction addresses a semaphore data structure stored in memory. If the semaphore indicates that the data is available, the process continues execution of its next instruction; otherwise, the process is stopped and placed into a wait state until the data become available. A process that performs a V instruction, on the other hand, delivers data to another process. The V instruction addresses a semaphore to determine whether another process is awaiting the data and data are transferred to an awaiting process. If no process is available, the V instruction enables one of the processes in the wait state tied to the same addressed semaphore to be transferred to the ready state. P and V instructions are provided for semaphore structures without messages as well as semaphore structures with messages. Each of the P and V instructions includes test instructions that enable a process to continue in the running state in the event that the test P or V instruction is unable to be executed.
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