发明授权
- 专利标题: Noise reduction circuit
- 专利标题(中): 降噪电路
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申请号: US300432申请日: 1981-09-08
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公开(公告)号: US4441084A公开(公告)日: 1984-04-03
- 发明人: Kenzo Akagiri , Masayuki Katakura , Motomi Ookouchi
- 申请人: Kenzo Akagiri , Masayuki Katakura , Motomi Ookouchi
- 申请人地址: JPX Tokyo
- 专利权人: Sony Corporation
- 当前专利权人: Sony Corporation
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX55-123966 19800909
- 主分类号: H04B1/62
- IPC分类号: H04B1/62 ; G11B20/04 ; H03G9/02 ; H03F1/26 ; H03G3/18
摘要:
A noise reduction circuit for use in an audio signal recording/reproducing apparatus is comprised of a first signal path including a voltage-controlled amplifier for amplifying a signal supplied thereto with controllable gain and integrating circuit for integrating at least that portion of the signal passing through the voltage-controlled amplifier within the audio range; a level detecting circuit for controlling the gain of the voltage-controlled amplifier in response to the level of the signal passing through the voltage-controlled amplifier; a feedforward resistor connected in parallel with the first signal path for providing a lower limit to the gain imparted to the signal supplied to the noise reduction circuit; an adder circuit for adding the output signals from the first signal path and the feedforward resistor; a second resistor or a low-pass filter connected as a negative feedback path between the output of the adder circuit and the input of the first signal path for providing an upper limit to the gain imparted to the signal supplied to the noise reduction circuit; and an anti-limiting circuit connected in parallel with the first signal path for compensating the signal supplied to the noise reduction circuit when the level of the signal is abruptly increased.
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