发明授权
- 专利标题: Vertical synchronizing signal detecting circuit
- 专利标题(中): 垂直同步信号检测电路
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申请号: US418069申请日: 1982-09-14
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公开(公告)号: US4459612A公开(公告)日: 1984-07-10
- 发明人: Mitsutoshi Shinkai , Masaaki Sakai , Kenji Nakano , Tadahiko Nakamura
- 申请人: Mitsutoshi Shinkai , Masaaki Sakai , Kenji Nakano , Tadahiko Nakamura
- 申请人地址: JPX Tokyo
- 专利权人: Sony Corporation
- 当前专利权人: Sony Corporation
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX54-171742 19791229; JPX54-171743 19791229
- 主分类号: G11B15/60
- IPC分类号: G11B15/60 ; G11B27/024 ; H04N5/10
摘要:
Digitally designed vertical synchronizing separator and framing circuit in association with a digital servo LSI for a video tape recorder are particularly designed to be noise-free system for a composite synchronizing signal reproduced from the video tape recorder and utilize a reference clock pulse with the synchronizing signal and a counter with a feed back of the contents of the counter to control the supply of said composite synchronizing signal.
公开/授权文献
- US5026154A Multipulsed dynamic moire interferometer 公开/授权日:1991-06-25
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